PhoneDB - infinitely detailed




FacebookGoogle PlusRSS FeedTwitter

Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Apple
Type A5R3 APL7498
Codename S5L8947
Year Released 2013
FunctionMain function of the component  Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv7
Pipeline StagesPipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. 8 pipeline stages
Number of processor core(s) 1
Type of processor core(s)Type and allocation of processor core(s) ARM Cortex-A9

BusesBuses: 
Memory Interface(s):   mobile (LP) DDR2 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 400 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 32 bit
Number of data bus channels 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 6.4 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  moviNANDmoviNAND is a multimedia card (MMC) controller and onboard firmware developed by Samsung in 2006 , NAND Flash Interface , SATASATA revision 1.0 (2003) offering 1.5 Gbit/s data rate


Clock FrequenciesClock Frequencies: 
Recommended Minimum Clock Frequency 800 MHz min.
Recommended Maximum Clock Frequency 1000 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 512 Kbyte L2

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 32 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
FabPlant which fabricates the semiconductor component Samsung

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). IMG PowerVR SGX543 GPU
Number of GPU cores 2-core GPU
GPU Clock 200 MHz GPU

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Communication InterfacesCommunication Interfaces: 
Supported USB Specification:   No
Bluetooth supportThis field specifies the supported BT version  No
Wireless LAN supportThis field enumerates the supported Wi-Fi protocols  No
Supported Audio/Video Interface:   HDMI (Unspecified)

Satellite NavigationSatellite Navigation: 
Supported GPS protocol(s):   GPS (NMEA 0183)NMEA 0183

Additional InformationAdditional Information: 
Special Features
single ARM Cortex-A9 Harvard Superscalar processor core, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, triple display controller, 1080p video encode, 1080p video decode, audio subsystem, OpenGL ES 2.0

Datasheet AttributesDatasheet Attributes: 

Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Final
AddedThe exact time of the datasheet addition 2024-07-12 11:07
 
You are here: Processor Specs \ Apple A5R3 APL7498 (S5L8947) datasheet