Generel Characteristics: |
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Designer | Apple |
Type: | A13 Bionic APL1085 / APL1W85 |
Codename: | T8030 |
Year Released: | 2019 |
Function | Multi-core Application Processor |
Architecture: |
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Width of Machine Word | 64 bit |
Supported Instruction Set(s): | ARMv8.4-A (A32, A64) |
Type of processor core(s) | 2x Apple Lightning + 4x Apple Thunder cores |
Number of processor core(s): | hexa-core |
Buses: |
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Memory Interface(s): | LPDDR4x SDRAM |
Max. Clock Frequency of Memory IF | 2133 MHz |
Data Bus Width | 16 bit |
Number of data bus channels: | 4 ch |
Max. Data Rate | 34.13 Gbyte/s |
Non-volatile Memory Interface | eMMC 5.1 , moviNAND , NAND Flash Interface , SATA , UFS 3.0 |
Clock Frequencies: |
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Recommended Maximum Clock Frequency: | 2660 MHz max. |
Cache Memories: |
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L1 Instruction Cache per Core | 128 Kbyte I-Cache |
L1 Data Cache per Core | 128 Kbyte D-Cache |
Total L2 Cache | 4096 Kbyte L2 |
Total L3 Cache: | 16384 Kbyte L3 |
Technology and Packaging: |
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Feature Size | 7 nm |
Semiconductor Technology: | FinFET |
Number of Transistors Integrated: | 8500000000 |
Fab | TSMC |
Graphical Subsystem: |
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Embedded GPU | Apple A13 GPU |
Number of GPU cores: | 4-core GPU |
GPU Clock: | 1350 MHz GPU |
Cellular Communication: |
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Supported Cellular Data Links | No |
Additional Information: |
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Special Features: 2x high-performance Apple Lightning 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (up to 2660 MHz, 128 KB L1 data cache per core, 128 KB L1 instruction cache per core) + 4x high-efficiency Apple Thunder 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor.. ›› |
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Datasheet Attributes: |
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Data Integrity | Preliminary |
Added | 2019-09-12 12:14 |
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