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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Apple
Type A10X Fusion APL1071 / APL1W71
Codename T8011
Year Released 2017
FunctionMain function of the component  SoC

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 64 bit
Supported Instruction Set(s) ARMv8.1-A (A32, A64)
Type of processor core(s)Type and allocation of processor core(s) 3x Apple Hurricane + 3x Zephyr cores
Number of processor core(s) quad-core

BusesBuses: 
Memory Interface(s):   LPDDR4 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 1600 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 64 bit
Number of data bus channels 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 51.2 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  eMMC 5.1Complies with embedded MMC 5.1 specification released in 2015 , moviNANDmoviNAND is a multimedia card (MMC) controller and onboard firmware developed by Samsung in 2006 , NAND Flash Interface , SATASATA revision 1.0 (2003) offering 1.5 Gbit/s data rate


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 2380 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 64 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 64 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 3072 Kbyte L2
Total L3 Cache 8192 Kbyte L3

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 10 nm
Semiconductor Technology:   FinFETMultigate (usually double-gate) MOSFET transistor technology
Number of Transistors Integrated 4000000000
FabPlant which fabricates the semiconductor component TSMC

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). IMG PowerVR GT7600 Plus GPU
Number of GPU cores 12-core GPU
GPU Clock 1000 MHz GPU

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Additional InformationAdditional Information: 
Special Features
3x high-performance 2.38 GHz Apple Hurricane 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (64 Kbyte L1i cache per core + 64 Kbyte L1d cache per core) + 3x high-efficiency 1.3 GHz Apple Zephyr 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores.. ››

Datasheet AttributesDatasheet Attributes: 

Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Preliminary
AddedThe exact time of the datasheet addition 2017-06-06 18:48
 
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