 Generel Characteristics:
|
Designer |
MediaTek |
| Type: |
MT6750 |
| Year Released: |
2016 |
| Function |
Multi-core Application Processor with Modem |
 Architecture:
|
| Width of Machine Word |
64 bit |
| Supported Instruction Set(s): |
ARMv8 (A32, A64) |
| Type of processor core(s) |
8x ARM Cortex-A53 MPcore |
| Number of processor core(s): |
octa-core |
 Buses:
|
| Memory Interface(s): |
LPDDR3 SDRAM |
| Max. Clock Frequency of Memory IF |
667 MHz |
| Data Bus Width |
32 bit |
| Number of data bus channels: |
1 ch |
| Max. Data Rate |
5.34 Gbyte/s |
| Non-volatile Memory Interface |
eMMC 5.1 |
 Clock Frequencies:
|
| Recommended Minimum Clock Frequency: |
296 MHz min. |
| Recommended Maximum Clock Frequency: |
1510 MHz max. |
 Cache Memories:
|
| L1 Instruction Cache per Core |
32 Kbyte I-Cache |
| L1 Data Cache per Core |
32 Kbyte D-Cache |
| Total L2 Cache |
512 Kbyte L2 |
 Technology and Packaging:
|
| Feature Size |
28 nm |
| Semiconductor Technology: |
CMOS |
 Graphical Subsystem:
|
| Embedded GPU |
ARM Mali-T860 GPU |
| Number of GPU cores: |
2-core GPU |
| GPU Clock: |
350 MHz GPU |
 Cellular Communication:
|
| Supported Cellular Data Links |
CSD
, GPRS
, UMTS
, HSUPA
, HSUPA 11.5
, DC-HSDPA 42.2
, CDMA2000 1x
, CDMA2000 1xEV-DO
, CDMA2000 1xEV-DO Rev A
, TD-SCDMA
, LTE
, LTE 100/50
, LTE 150/50
, LTE 300/50 data links |
 Additional Information:
|
Special Features:
octa ARM Cortex-A53 Harvard Superscalar processor core (4-core 1,5 GHz cluster + 4-core 1 GHz cluster), HMP, eMMC 5.1, integrated GSM / GPRS / UMTS / DC-HSPA 42 Mbps / HSUPA 11 Mbps / TD-SCDMA 2.8 Mbps / CDMA2000 1xRTT.. ›› |
 Datasheet Attributes:
|
| Data Integrity |
Preliminary |
| Added |
2016-04-24 18:28 |
All details | 
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