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Designer |
NVIDIA |
| Type: | Tegra 2 3D AP25H |
| Year Released: | 2011 |
| Function |
Multi-core Application Processor |
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| Width of Machine Word |
32 bit |
| Supported Instruction Set(s): | ARMv7-A |
| Pipeline Stages |
8 pipeline stages |
| Type of processor core(s) |
2x ARM Cortex-A9 MPcore |
| Number of processor core(s): | dual-core |
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| Memory Interface(s): | DDR2 SDRAM , LPDDR2 SDRAM |
| Data Bus Width |
32 bit |
| Number of data bus channels: | 1 ch |
| Non-volatile Memory Data Bus Width |
32 bit |
| Non-volatile Memory Interface |
NAND Flash Interface |
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| Recommended Maximum Clock Frequency: | 1500 MHz max. |
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| L1 Instruction Cache per Core |
32 Kbyte I-Cache |
| L1 Data Cache per Core |
32 Kbyte D-Cache |
| Total L2 Cache |
1024 Kbyte L2 |
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| Feature Size |
40 nm |
| Semiconductor Technology: |
CMOS |
| Fab |
TSMC |
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| Embedded GPU |
NVIDIA GeForce ULP GPU |
| Number of GPU cores: | 4-core GPU |
| GPU Clock: | 400 MHz GPU |
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| Supported Cellular Data Links |
No |
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| Special Features: 2 Cortex-A9 Harvard Superscalar processor, 32-bit LP-DDR2 and DDR2 SD RAM interface, Enhanced NAND Flash support, High Definition Audio Video Processor (1080p H.264/VC-1/MPEG-4 Video Decode, 1080p H.264 Video Encode), integrated 400MHz 4-core NVIDIA GeForce ULP GPU, Up to 12 megapixel.. ›› |
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| Data Integrity |
Preliminary |
| Added |
2011-09-27 19:23 |
| Tweet | |
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