Marvell Armada 510 datasheet

Generel Characteristics:
Designer	Marvell
Type:	Armada 510
Year Released:	2010
Function	Application Processor
Collapse datasheet \| Add to compare Architecture:
Width of Machine Word	32 bit
Supported Instruction Set(s):	ARMv7, WMMX2
Number of processor core(s):	1
Type of processor core(s)	Marvell Sheeva
Buses:
Memory Interface(s):	mobile (LP) DDR SDRAM , mobile (LP) DDR3 SDRAM
Data Bus Width	32 bit
Number of data bus channels:	1 ch
Non-volatile Memory Data Bus Width	8 bit
Non-volatile Memory Interface	SATA
Clock Frequencies:
Recommended Minimum Clock Frequency:	1200 MHz min.
Recommended Maximum Clock Frequency:	N/A
Cache Memories:
L1 Instruction Cache per Core	32 Kbyte I-Cache
L1 Data Cache per Core	32 Kbyte D-Cache
Total L2 Cache	512 Kbyte L2
Technology and Packaging:
Semiconductor Technology:	CMOS
Graphical Subsystem:
Embedded GPU	N/A
Collapse datasheet Cellular Communication:
Supported Cellular Data Links	No
Communication Interfaces:
Supported USB Specification:	No
Bluetooth support	No
Wireless LAN support	No
Supported Audio/Video Interface:	No
Satellite Navigation:
Supported GPS protocol(s):	No
Additional Information:
Special Features: Marvell Sheeva Superscalar processor core, integrated FPU v.3, 32-bit LP-DDR/DDR2/DDR3 SD RAM interface, NAND Flash support, integrated Marvell GC600 2D/3D graphics engine, 1080p H.264 30fps Decode, 1080p 30fps H.264 Encode, Up to 8 megapixel camera support, USB 2.0 host, USB 2.0 OTG, HDMI v1.3a TV out support, Wi-Fi, SATA, Ethernet, PCI Express, SDIO support
Datasheet Attributes:
Related Page:	URL
Data Integrity	Preliminary
Added	2010-03-19 23:35