Generel Characteristics: |
Designer |
ARM |
Type: |
Cortex-A9 |
Year Released: |
2007 |
Function |
Application Processor |
Architecture: |
Width of Machine Word |
32 bit |
Supported Instruction Set(s): |
ARMv7-A |
Type of processor core(s) |
ARM Cortex |
Number of processor core(s): |
single-core |
Buses: |
Memory Interface(s): |
Yes |
Data Bus Width |
32 bit |
Number of data bus channels: |
1 ch |
Non-volatile Memory Interface |
No |
Clock Frequencies: |
Recommended Maximum Clock Frequency: |
N/A |
Cache Memories: |
Technology and Packaging: |
Feature Size |
65 nm |
Semiconductor Technology: |
CMOS |
Graphical Subsystem: |
Embedded GPU |
N/A |
Cellular Communication: |
Supported Cellular Data Links |
No |
Additional Information: |
Special Features: Harvard Superscalar processor, Configurable L1 and L2 cache sizes, FPU, MMU, 64 bit AMBA 3.0 AXI bus, NEON Media Processing technology, ARM Thumb-2 Technology, ARM TrustZone Technology, ARM CoreSight, ARM TrustZone, ARM Jazelle RCT + DBX |
Datasheet Attributes: |
Data Integrity |
Final |
Added |
2009-07-18 13:54 |