SiRF SiRFprima datasheet

Generel Characteristics:
Designer	SiRF
Type:	SiRFprima
Year Released:	2008
Function	Application Processor
Collapse datasheet \| Add to compare Architecture:
Width of Machine Word	32 bit
Supported Instruction Set(s):	ARMv6
Pipeline Stages	8 pipeline stages
Number of processor core(s):	1
Type of processor core(s)	ARM1136JF-S
Buses:
Memory Interface(s):	Yes
Data Bus Width	64 bit
Number of data bus channels:	1 ch
Non-volatile Memory Data Bus Width	16 bit
Non-volatile Memory Interface	NAND Flash Interface
DMA Channels	16 ch
Clock Frequencies:
Recommended Minimum Clock Frequency:	600 MHz min.
Recommended Maximum Clock Frequency:	N/A
Cache Memories:
L1 Instruction Cache per Core	16 Kbyte I-Cache
L1 Data Cache per Core	16 Kbyte D-Cache
Total L2 Cache	128 Kbyte L2
Technology and Packaging:
Feature Size	65 nm
Semiconductor Technology:	CMOS
Graphical Subsystem:
Embedded GPU	N/A
Collapse datasheet Cellular Communication:
Supported Cellular Data Links	No
Communication Interfaces:
Supported USB Specification:	No
Bluetooth support	No
Wireless LAN support	No
Supported Audio/Video Interface:	No
Satellite Navigation:
Supported GPS protocol(s):	Yes
Supported Galileo service(s)	Yes
Additional Information:
Special Features: VFPU, MMU, 16 channels DMA, Mobile-SDR, Mobile-DDR, DDR1 support, AMBA 2.0 AHB, ARM Jazelle, integrated 64 channels GPS / Galileo module, SiRFInstantFixII, SiRFInstantFix,SiRFDiRect, OpenGL ES 1.1 support
Datasheet Attributes:
Related Page:	URL
Data Integrity	Final
Added	2009-03-20 18:52