Generel Characteristics: |
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Designer | Telechip |
Type: | TCC7801 |
Year Released: | 2007 |
Function | Multi-core Application Processor |
Architecture: |
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Width of Machine Word | 32 bit |
Supported Instruction Set(s): | ARMv5TEJ |
Type of processor core(s) | ARM926EJ-S |
Number of processor core(s): | single-core |
Buses: |
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Memory Interface(s): | Yes |
Data Bus Width | 32 bit |
Number of data bus channels: | 1 ch |
Non-volatile Memory Interface | NAND Flash Interface |
Clock Frequencies: |
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Recommended Maximum Clock Frequency: | N/A |
Cache Memories: |
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L1 Instruction Cache per Core | 16 Kbyte I-Cache |
L1 Data Cache per Core | 16 Kbyte D-Cache |
Technology and Packaging: |
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Feature Size | 130 nm |
Semiconductor Technology: | CMOS |
Graphical Subsystem: |
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Embedded GPU | N/A |
Cellular Communication: |
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Supported Cellular Data Links | No |
Additional Information: |
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Special Features: ARM946ES sub processor, 3x32 kbytes SRAM + 8 kbyte Boot ROM, 4+8 kbyte tightly coupled Memory |
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Datasheet Attributes: |
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Data Integrity | Final |
Added | 2008-10-28 18:31 |
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